A Practical Processor Design For Multithreading

High speed message handling is one of the most important problems for e cient multithread processing. We have proposed a processor architecture called DatarolII, that promotes the e cient ne-grain multithreaded execution, by performing fast context switching among ne-grain concurrent processes. We are developing a prototype multithread machine KUMP/D (Kyushu University Multi-media Processor on Datarol-II). The processing element of KUMP/D is designed on the basis of a ne-grain message driven (FMD) execution model, in which ne-grain multithreaded executions are driven and controlled by simple ne-grain message communications. In the design of the KUMP/D, we used the o -the-shelf microprocessor Pentium for its processing element, and designed a co-processor, called FMP (Fine grain Message Processor), for ne grained message handling and communication control. In this paper, we propose the FMD model and introduce the processing element construction in the KUMP/D machine, which is a practical implementation of the FMD using the Pentium and the FMP, then discuss the feasibility of the design from the viewpoint of cost/performance.